Avalanche Technology has been awarded four key "milestone" patents for its STT-MRAM technology and solid-state storage array system design. Avalanche has over 200 filed patents that covers the full spectrum from memory cell/circuit design and manufacturing to solid-state storage system development and deployment.
Avalanche (founded in 2006 and based in California, US) developed patented Spin Programmable STT-MRAM (SPMEM) memory that uses a revolutionary proprietary spin current and voltage switching technology. The company wants to license their technology for embedded applications and also build discrete standalone memory devices. In July 2012 the company raised $30 million.
The four new patents are:
- "Spin-transfer torque magnetic random access memory (STT-MRAM) with laminated free layer" (USPTO #8,374,025) – this invention discloses MTJ (magnetic tunnel junction) structures that are extremely applicable to high areal density perpendicular STT-MRAM, and is scalable to well below 10nm, solving the scaling challenges faced by existing technologies today.
- "Resistive Memory Device Having Vertical Transistors and Method for Making The Same" (USPTO #8,575,584) – this is a novel memory cell design that utilizes a surrounding gate vertical access transistor for resistive memory devices, including STT-MRAM. The cell design would allow Avalanche to attain a cell size of 4 F2 for its future memory.
- "Method and apparatus for increasing the reliability of an access transistor coupled to a magnetic tunnel junction (MTJ)" (USPTO #8,295,083) – the Avalanche STT-MRAM products are built using standard CMOS, delivering high-performance non-volatile memory for a wide range of applications at a price point approaching existing DRAM and SRAM solutions.
- "Host-managed logical mass storage device using magnetic random access memory" (USPTO #8,547,745) – enables vertically integrated memory storage arrays built from the ground up, delivering high performance, scalability and low power with a full suite of enterprise features.