MRAM-Info: the MRAM experts

In June 2017 it was reported that Taiwan Semiconductor Manufacturing Company (TSMC) will start producing embedded MRAM in 2018 using a 22 nm process. In what may bet he first adoption of TSMC's eMRAM technology, AI accelerator startup Gyrfalcon Technology announced the commercial availability of its LightSpeeur 2802M, AI ASIC that include TSMC's eMRAM.

The 2802M ASIC has 40MB of eMRAM memory, which can support large AI models or multiple AI models within a single chip. Applications include image classification, voice identification, voice commands, facial recognition, pattern recognition and more.

Market analyst firm Yole Developpement presents its latest next-generation memory forecasts in an interesting new article. The company says that following more than 15 years of development, PCM is finally taking off in stand-alone applications due to strong support from Intel and Micron.

STT-MRAM is expected to lead the embedded memory race as many foundries are rushing to add MRAM support and expertise to their product lines. STT-MRAM is promising for enterprise storage SCM.

Researchers at Belgium-based research institute Imec presented the first power-performance area comparison between SRAM and STT-MRAM last-level cache at the 5 nm node.

The analysis, based on design-technology co-optimization and silicon verified models, reveals that STT-MRAM meets the performance requirements for last-level caches in the high-performance computing domain. For larger memory densities, STT-MRAM was found to offer significant energy gains compared to SRAM.

EDA and semiconductor IP provider Silvaco announced today that Austria's second Christian Doppler Laboratory (CDL) was opened in collaboration with TU Wien's Institute for Microelectronics. The new CDL will develop new MRAM device simulation solutions.

TU Wien's Dr. Viktor Sverdlov, who heads the new CDL, says that "MRAM has the potential to deliver both more memory density and much lower power consumption extending memory beyond the current solutions".

pMTJ STT-MRAM developer Avalanche Technology announced its 2nd-generation serial non-volatile discrete MRAM memory family. The SPnvSRAM family offers 1 Mb to 32 Mb densities at extended-temperature industrial-grade specifications. Avalanche says that these devices, available in low pin count, small package options, are ideal for a broad range of industrial, automotive and consumer applications.

Avalanche's 2-Gen SPnvSRAM is offered in 108-MHz Quad Serial Peripheral Interface (QSPI) performance as a byte addressable memory thus eliminating the need for software device drivers.

SMART Modular Technologies has launched its new nvNITRO U.2 Storage Accelerator that features Everspin's STT-MRAM technology. The nvNITRO is ideally suited for synchronous logging applications such as those used for financial trading.

SMART's nvNITRO U.2 Storage Accelerator uses a standard NVMe interface that is 1.2.1 compliant and provides less than six microseconds of industry-leading low latency access with persistence so that all logging data is safe. The U.2 form factor brings with it the advantage of being hot-swappable.

Spin Memory (previously Spin Transfer Technologies) announced that is has signed a licensing agreement with Arm. The license includes Spin Memory's Endurance Engine technology and IP - and as part of the agreement Arm and Spin memory will also work together to create SRAM-class MRAM design solutions.

Spin Memory's Endurance Engine is a design architecture that is used to develop embedded MRAM solutions.