California-based Avalanche Technology is a start up company founded in 2006 to develop patented Spin Programmable perpendicular STT-MRAM (SPMEM) memory that uses a revolutionary proprietary spin current and voltage switching technology that enables lower write current, smaller cell size, higher density and excellent scalability.

Avalanche Technology currently offers STT-MRAM chips up to 64Mb in size, in both discrete and embedded form.

Avalanche started to sample 32Mb and 64Mb STT-MRAM chips in 2015. In February 2016 the company raised $23 million, adding to the $30 million raised in 2012. In October 2016 Avalanche announced a collaboration with Sony Sony Semiconductor Manufacturing Corporation to start volume pMTJ STT-MRAM production on 300mm wafers by early 2017.

Company Address: 
46600 Landing Parkway,
Fremont, CA 94538
United States
Company Geofield: 

The latest Avalanche news:

Avalanche announces new 64Mb industrial x16-interface STT-MRAM memory devices

pMTJ STT-MRAM developer Avalanche Technology announced the immediate availability of new 64Mb Industrial parallel asynchronous x16-interface high-reliability MRAM Persistent SRAM (P-SRAM) memory devices. Avalanche's P-SRAM is based on the company's STT-MRAM technology



Avalanche Technology SPnvSRAM G2 MRAM evaluation board photo

These new deices, the latest in Avalanche's family of Industrial data logging products, require half the board space, consume 1/4th the power and have 3 times the magnetic immunity of the equivalent density Toggle MRAM in Industrial applications.

Avalanche and LinearASICs to co-develop companion chiplets for Avalanche's Space Grade MRAM

pMTJ STT-MRAM developer Avalanche Technology announced that it has signed an agreement with LinearASICs Inc. to develop companion chiplets to offer a complete portfolio of Space Grade products with SPI and DDR interfaces, based on Avalanche's 1Gb Space Grade MRAM.

Avalanche pMTJ STT-MRAM P-SRAM Serial QSPI Evaluation Kit photo

Avalanche's 2nd-Gen P-SRAM evaluation kit

LinearASICs will provide standalone serial interface chiplets such as Octal SPI (OSPI), as well as standard memory interface chiplets such as DDR. These chiplets will be available as standalone devices or integrated modules through Avalanche.

Avalanche announces space-grade Gigabit-density STT-MRAM

pMTJ STT-MRAM developer Avalanche Technology announced its third-generation 1Gb space-grade parallel asynchronous x32-interface high-reliability P-SRAM (Persistent SRAM) memory devices. The company says that these new devices enable customers to design unified memory architecture systems for high reliability aerospace applications, in extremely small form factors.

Avalanche pMTJ STT-MRAM P-SRAM Serial QSPI Evaluation Kit photo

Avalanche's 2nd-Gen P-SRAM evaluation kit

The new Parallel x32 Space Grade series is offered in 512Mb, 1Gb, 2Gb and 4Gb density options and has asynchronous SRAM compatible 45ns/45ns read/write timings. Data is always non-volatile with >10^14 write cycles endurance and 10-year retention at 125°C. All four density options are available in a small footprint 142-Ball FBGA (17mm x 11mm) package.

Avalanche starts production of space-grade 16-64Mb STT-MRAM devices

pMTJ STT-MRAM developer Avalanche Technology announced that it is now shipping new space-grade parallel asynchronous x16-interface high-reliability P-SRAM (Persistent SRAM) memory devices, based on its latest STT-MRAM technology.

Avalanche pMTJ STT-MRAM P-SRAM Serial QSPI Evaluation Kit photo

Avalanche says that its STT-MRAM devices are smaller and more efficienct compared to Toggle MRAM based products, currently adopted in aerospace applications. The Parallel x16 Space Grade series is offered in 16Mb, 32Mb and 64Mb density options and has asynchronous SRAM compatible 45ns/45ns read/write timings. All three density options currently in production and available within industry standard lead times.

Avalanche Technology's Serial P-SRAM STT-MRAM memory devices are now shipping

pMTJ STT-MRAM developer Avalanche Technology announced that its new industrial-grade Serial (SPI) P-SRAM (Persistent SRAM) memory devices are now available. The Serial (SPI) memory devices are designed to be drop-in replacements to Cypress F-RAM and Everspin Toggle MRAM memory products.

Avalanche pMTJ STT-MRAM P-SRAM Serial QSPI Evaluation Kit photo

The Series (SPI) series supports up to 50MHz clock rate in 1Mb and 4Mb density options, in two packages - 8-pin SOIC and 8-pin WSON. These use Avalanche's 40nm pMTJ STT-MRAM chips.

Avalanche Technology raises $33 million in a new funding round

pMTJ STT-MRAM developer Avalanche Technology announced that it closed its latest funding round led by Thomvest Ventures, having raised $33 million.

Avalanche currently brands its MRAM chips as P-SRAM (persistent SRAM) devices. The new funds will enable the company to develop higher-density P-SRAM devices. In addition, Avalanche says it will develop the higher densities of "persistent DRAM" required for the next generation of machine learning architectures.

Avalanche Technology announces its 2nd-generation pMTJ STT-MRAM chips at 1-32 Mb densities

pMTJ STT-MRAM developer Avalanche Technology announced its 2nd-generation serial non-volatile discrete MRAM memory family. The SPnvSRAM family offers 1 Mb to 32 Mb densities at extended-temperature industrial-grade specifications. Avalanche says that these devices, available in low pin count, small package options, are ideal for a broad range of industrial, automotive and consumer applications.



Avalanche's 2-Gen SPnvSRAM is offered in 108-MHz Quad Serial Peripheral Interface (QSPI) performance as a byte addressable memory thus eliminating the need for software device drivers.

Avalanche sign an agreement with UMC for 28nm embedded STT-MRAM technology

pMTJ STT-MRAM developer Avalanche Technology announced that it has entered into a joint development and production agreement with Taiwan's United Microelectronics Corporation (UMC), a global semiconductor foundry.

UMC will provide embedded non-volatile STT-MRAM blocks based on UMC's 28nm CMOS manufacturing process, which will enable customers to integrate low latency, very high performance and low power embedded MRAM memory blocks into MCUs and SoCs, targeting the Internet of Things, wearable, consumer, industrial and automotive electronics markets.

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