SOT-MRAM

China-based MRAM developer Truth Memory Corporation announced that it has successfully demonstrated the world's first 8 Mb SOT-MRAM chip, using a 110 nm technology node.

TMC developed a fully-integrated wafer-level SOT-MRAM manufacturing flow based on an autonomous 8-inch platform compatible with mainstream CMOS back-end processes. TMC says that through optimized magnetic stack engineering and low-damage etching with precise sidewall passivation, it has developed high-performance SOT-MTJ arrays with 150 nm.

Researchers from Intel, in collaboration with researchers at Georgia Institute of Technology designed a new SOT-MRAM device at 7 nm. This work spans the entire project range, from device-level characteristics to system-level power performance area. 

Based on ASAP7 PDK design rules, the researchers created the bit-cell and peripheral layouts for SOT-MRAM and designed the entire array. Based on place and route, the system-level PPA was calculated for various memory capacities, demonstrating bit-densities up to 14.8 Mb/mm² and read bandwidths up to 2.98 GB/s. 

Researchers at Japan's Kyushu University have developed a new SOT-MRAM memory cell based on thulium iron garnet (TmIG). The researchers say that this material can enhance the efficiency of the memory cell.

The researchers say that TmIG, originally developed in Japan in 2012, is promising, but it requires a very high quality thin film deposition to be used in a memory device. The team has managed to now produce the material in this high quality, using an established mass production method called on-axis sputtering.

Researchers from TSMC, Sandford University, ITRI and National Yang Ming Chiao Tung University have fabricate a 64-kb SOT-MRAM based β-phase Tungsten that offers a spin–orbit torque switching of 1 ns, data retention of more than 10 years and a tunnelling magnetoresistance of 146%.

The researchers say that Tungsten is a promising heavy metal for such applications and can generate large spin–orbit torques when stabilized in its β-phase. However, the α-phase, which has a lower spin-Hall angle, is more thermodynamically stable. It is thus challenging to integrate metastable β-tungsten into complementary metal–oxide–semiconductor processes while maintaining phase stability under the back-end-of-line thermal constraints (400 °C for extended durations). 

A team of researchers at Tohoku University have achieved the world's lowest write power SOT-MRAM device, that is also offering an extremely fast write time.

The researchers focused on the tilt angle of the canted SOT device and the magnetic anisotropy of the free layer, using micro-magnetic simulation to reduce the write power. The have achieved a write power of 156 fJ in 75° canted SOT devices fabricated using a 300mm wafer process. 

Researchers from Beihang University and Truth Memory Corporation have fabricated a 1 Kbit SOT-MRAM chip using a 180 nm complementary metal oxide semiconductor (CMOS) process, and implemented a physical unclonable function (PUF) on it. This research represents a significant step forward in the field of PUFs.

The newly developed SOT-MRAM sr-PUF achieves a strong, highly reliable, and reconfigurable PUF that can resist machine-learning attacks. The performance of the SOT-MRAM sr-PUF is remarkable - it has a challenge-response pair (CRP) capacity of 109. Its uniformity is 50.07%, diffuseness is 50%, uniqueness is 49.89%, and the bit error rate is 0%, even in a 375 K environment. These values are near-ideal, indicating excellent randomness and reliability.

Researchers from the Johannes Gutenberg University Mainz (JGU) in Germany, in collaboration with Antaios, have developed a new SOT-MRAM based platform that enables highly efficient and powerful data processing and storage.

By exploiting previously neglected orbital currents, the researchers have developed a unique magnetic material incorporating elements such as Ruthenium as a SOT channel—a fundamental building block of SOT MRAM—to significantly enhance performance. 

Vertical Compute, a new startup that was spun-off from the imec institute to commercialize its MRAM technology for AI applications, has raised 20 million Euro. The seed round was led by imec.xpand and supported by Eurazeo, XAnge, Vector Gestion, and imec.

The company says that it will develop an MRAM in-memory computing chiplet technology. The chiplet, according to the company, can reduce power consumption by 80% and speed up the execution of large language models for AI by 100X. It is believed that the company's MRAM is based on SOT-MRAM technology.

Researchers from the Institute of Science Tokyo (formerly Tokyo Tech), in collaboration with Western Digital, has developed a new high-performance material suitable for low-power SOT-MRAM.

The researchers are using BiSb material under the CoFeB/MgO, with perpendicular magnetic anisotropy. By optimizing the interfacial layer thickness as well as deposition condition of BiSb, the researchers managed to achieve a large effective spin Hall angle and relatively high electrical conductivity. The researchers continued to demonstrate spin–orbit torque-induced magnetization switching driven by a small threshold current density.

Everspin Technologies is at the forefront of the MRAM industry, with a product range that spans Toggle MRAM and STT-MRAM, embedded MRAM IP, more. The company's president and CEO, Sanjeev Aggarwal, was kind enough to answer a few questions we had about the company, it's recent announcements and its future roadmap.

Thank you for your time Sanjeev, we appreciate it. A few days ago, Everspin announced it had received a strategic $14.55 million 2.5-year DoD project to provide continued and stable manufacturing services. Can you share more info? How will that money be allocated, and how will you ensure stable support?

Everspin has partnered with the DoD on various projects to deploy our MRAM technology and fab MRAM products for Defense Industrial Base customers in Chandler, Arizona. The award money will be used to strength the US MRAM manufacturing supply chain.  Everspin will look at its supply chain and mitigate any risks identified. This can include second-sourcing gases and chemicals as well as upgrading processes.