Toshiba and Hynix prototype a 4 Gb STT-MRAM

Toshiba and SK Hynix co-developed a 4-Gbit STT-MRAM chip, and presented a prototype at IEDM 2016.

Toshiba Hynix 4Gb STT-MRAM mTJ array photo

The prototype chip is made from eight 512-Mbit banks, and the cell area is equivalent to that of DRAM - at 9F2, which Hynix says is much smaller than conventional STT-MRAMs (50F2).

Toshiba Hynix 4Gb STT-MRAM structure (Dec 2016)

Hynix and Toshiba hopes to commercialize their STT-MRAM technology in 2-3 years.

Posted: Dec 20,2016 by Ron Mertens