UCLA has been awarded $5.5 million from DARPA to continue develop STT-MRAM technologies. This is the second grant for this project, which brings the total DARPA grants to $10.5 million. The first stage has been completed a year early than planned - by meeting (and in fact significantly surpassing) speed, energy consumption and stability requirements of their STT-RAM (write times smaller than 5 nanoseconds and write energies lower than 0.25 picojoules per bit).
The first phase focused on material and structure innovations. In the second phase, the team will further improve the energy and stability, and will build prototype chips. Another important part of the second phase will be statistical studies needed to facilitate integration with CMOS to realize a product.