July 2013

Yesterday we reported that Crocus Technology raised €34 million (about $45 million) in their Series D round of funding. Crocus said that part of that money will be used to ramp up its manufacturing at Tower Semiconductors (in Israel), and today they reported about a major breakthrough in that technology development, which they will bring to market by Q4 2013.

Crocus, together with TowerJazz now offers SRAM-performance with non-volatile MRAM. The MRAM solution has demonstrated best-in-class performance and more than two billion cycles of program/erase were demonstrated on a 4M bit NVM product. The first market that the two companies will address is Battery Backed SRAM (BB-SRAM). The MRAM technology offers fast access times, low power and unlimited write cycles - without the need for cost, recharging and long-term disposal of a Lithium battery.

Crocus Technology have completed their Series D round of funding, raising €34 million (about $45 million). The company raised $80 so far (not counting the $300 million from RUSNANO towards a manufacturing fab in Russia). The company hopes to start generating revenue by the end of 2013 and become cashflow break-even by the end of 2014.

Crocus are rather busy. They will use the money to ramp up its manufacturing at Tower Semiconductors (in Israel) while also qualifying its Russian joint venture fab in Moscow. They expect first engineering wafers in the summer.

One year ago, the French National Research Agency (ANR) launched an MRAM project called MARS (MRAM based Architecture For Reliable and low power Systems). The main focus of this project is the study of MRAM technology's contribution to embedded processors architectures. MARS also aims to build new MRAM architectures and design new software models.

The MARS project already reached several milestones:

• An open-source, generic STT and TAS compact Model (Spinlib library) for electrical simulation
• Developed new Non-Volatile Flip Flop (several patents were already requested) and a new non-volatile SRAM/MRAM memory (also patented)
• A full study on reliability on the STT-MRAM comprising noise and stochastic effects
• A study on the use of MRAM on the embedded processor hierarchy (MRAM cache memory based architecture)
• New MRAM/DRAM cells was designed and successfully tested on silicon