MRAM News, Resources & Information
MRAM is a next-generation memory technology, based on electron spin rather then its charge. Often referred to as the "holy-grail of memory", MRAM is fast, high-density and non-volatile and can replace all kinds of memories used today in a single chip.
Researchers from France's SPINTEC/CEA developed a a new multi-bit MRAM storage paradigm that may enable a large density boost for MRAM devices. The researchers achieved up to 4 bits per cell on 110-nm devices.
Multi-bit per cell relies on multiple-voltage levels that correspond to various magnetic configurations. this is readable by key features of the electrical response (extrema points).
Researchers from New Zealand's Victoria University are developing MRAM devices (MTJs) based on rare earth nitrides (RENs). RENs, grown under ulta-high vacuum are both magnetic and semiconducting.
The team is basing its work on europium nitride, which is not usually magnetic, but has been "tricked" into behaving like a magnet by being produced with slightly too few nitrogen atoms. Those RENs are grown in France's Centre for Research on Hetero-Epitaxy and Applications.
One of the problems with flash memory is that it is sensitive to defects. To solve this problem, researchers from Samsung Electronics are developing flash devices based on graphene quantum dots (GQDs). The performance of such a device is promising, with an electron density that is comparable to semiconductor and metal nanocrystal based memories. Those flash memory can also be made flexible and transparent.
The researchers used GQDs in three different sizes (6, 12, and 27 nm) between silicon dioxide layers. The memory of the QDs depend on their sizes: the 12 nm dot for example offers the highest program speed while the 27 nm dot has the highest erase speed, and is also the most stable. Samsung says that this is the first GQD demonstration in a practical device.
Nantero has been developing NRAM (carbon nanotube based memory) for a long time, and now they collaborated with researchers from Chuo University to show how this memory features high-speed, low-power-consumption and high-reliability operation.
An NRAM memory cell is made from a thin CNT film sandwiched between two metal electrodes. When voltage is applied, the CNTs come closer to each other (due to electrostatic force and intermolecular force) and the resistivity is lowered. When the voltage drops to zero, the CNTs do not separate as they are tightly attached. This creates a non-volatile memory. To seperate the CNTs, a phonon is generatd using a high voltage.
Toshiba developed new STT-MRAM technology that can be used to enable MRAM based cache memory for microprocessors. The L2 cache alone uses about 80% of the power consumed by the CPU, so reducing the power consumption of the cache is very important - and STT-MRAM may reduce this consumption by about 60%. It's not clear how close is this technology to actually being commercialized.
Toshiba's new STT-MRAM uses a dual-cell (2T-2MTJ) circuit in which the two MTJs have complementary resistive states (high and low resistive states). This eliminates the leak path and also increases the readout signal intensity - and so improves access speed. In Toshiba's cahce, the read time is 4.1 ns - very close to that of SRAM, while the write time (2.1ns) is similar to SRAM. Toshiba also implemented error correction mechanisms into the cache STT-MRAM chip.
Last month we reported that Avalanche Technology has been awarded four key "milestone" patents for its STT-MRAM technology and solid-state storage array system design. Today the company announced that it has been awarded four new STT-MRAM patents in areas of Perpendicular STT-MRAM and MRAM Integration and Manufacturing. Avalanche has over 200 filed patents that covers the full spectrum from memory cell/circuit design and manufacturing to solid-state storage system development and deployment.
The company has been awarded three key patents in the area of Perpendicular STT-MRAM:
Coughlin Associates released a new report on non-volatile memory and storage technologies. The authors see MRAM and STT-MRAM replacing SRAM and DRAM within the next few years - and probably before RRAM replaces flash memory. MRAM advances quickly and this will result in lower prices which will make the technology very competitive.
Coughlin projects that MRAM and STT-MRAM annual shipping capacity will rise from an about 80 TB in 2013 to 16.5 PB in 2019. Revenues will increase from $190 million in 2013 to $2.1 billion in 2019. This will obviously require more production capacity and the MRAM manufacturing equipment market (not including the CMOS creation) will rise from $52.9 million in 2013 to $246.3 million in 2019.