MRAM News, Resources & Information
MRAM is a next-generation memory technology, based on electron spin rather then its charge. Often referred to as the "holy-grail of memory", MRAM is fast, high-density and non-volatile and can replace all kinds of memories used today in a single chip.
Crocus Technology announced that ARM licensed the company's Magnetic Logic Unit (MLU) technology. The MLU is a CMOS based rugged magnetic technology capable of offering important advantages in performance, size and security for embedded micro-controllers. MLU can replace both flash and RAM and are suitable for mobile and security applications.
Crocus will provide ARM with access to its MLU technology, including MRAM blocks in sub-90 nm technology which can replace traditional flash memory, plus MIP (Match In Place) enabled technology which enhances the security of keys and other secret data. Crocus has been co-developing the MLU technology together with IBM since 2011.
MicroSense announced that they installed a full suite of STT-MRAM magnetic metrology tools at a leading edge semiconductor manufacturer. These metrology systems characterize the magnetic properties of multi-layer 300 mm wafers or coupons used in the development and manufacturing of Perpendicular and In-Plane STT-MRAM.
The company says that this is the first time a major customer ordered a full suite of their tools to use in an STT-MRAM program. This order includes a Polar Kerr system for 200mm or 300mm Perpendicular STT-MRAM wafers and a KerrMapper tool for 200mm or 300mm In-plane STT-MRAM wafers. MicroSense's EZ Vibrating Sample Magnetometer measures sample coupons from Perpendicular or In-Plane STT-MRAM wafers.
Tweaktown posted an interview with Everspin's CEO, Philip LoPresti, who explains the company technology and business.
Philip says that while Everspin currently ships only 64 Mbit STT-MRAM, they have plans to increase the density up to a Gigabit within the next few years.
Researchers from the National University of Singapore developed a new MRAM device structure technology that may prove to be easier to implement and have high reliability compared to current MRAM structures.
The researchers explain that current MRAM uses horizontal (in-plane) current-induced magnetization. This requires ultra-thin ferromagnetic structures which are challenging to implement and also suffer from low reliability. The new design uses magnetic multilayer structures as thick as 20 nanometer, providing an alternative film structure for transmission of electronic data and storage.
2013 is soon over. If you'd like to reflect back, here are the top 10 stories posted on MRAM-Info in the past year, ranked by popularity:
I wish all our readers a happy Christmas and a happy new 2014!
Integral Solutions International (ISI) announced a new module the WLA-3000 STT-MRAM Wafer Level Analyzer, the Gen3 Pulser. The new module is optimally matched with its proprietary probecard interface to produce programmable pulses as low as 5nS, with in-situ ability to perform ultra-fast measurements on the MTJs after pulsing.
The tester can be equipped with either the single or dual-channel pulse generator modules for improved UPH. The Gen3 Pulser module was redesigned to speed up Pulse related tests by an order of magnitude and features new Error Rate test (it can measure Error Rate of 10^6 in approximately 2 seconds). It is noew possible to characterize error rate as a function of VBias, Pulse Width/Amplitude, Field and other sweep parameters.
Toshiba's new STT-MRAM based computing architecture to enable drastically faster and more efficient CPUs
Toshiba announced a new computing architecture that uses only STT-MRAM to perform both operations and storage. The idea support computing capability, register file, primary cache and secondary cache all on the same perpendicular STT-MRAM, and Toshiba says it could lead to CPUs that are drastically faster and more efficient.
Toshiba explains that in the new architecture, the results of operations (answers) that correspond to combinations of certain inputs are prepared in advance in the form of a table and stored in the memory. In response to an input, an answer is read out of the memory. This is equivalent to an operation carried out by a CPU. Because the computation answer is read once, it drastically improves processing speed and power consumption.