Everspin Technologies announced its financial results for Q2 2022, with revenues of $14.71 million (up 24% from Q2 2021) and a net profit of $1.7 million . The company's had a positive cash flow of $4.3 million (up from a negative cash flow of $600,000 last year). At the end of the quarter Everspin had $23.1 million in cash and equivalents.

Everspin expects that industry supply constraints will limit supply, and the company reduces its forecast for Q3 2022 - with revenues seen to be in the range of $14.4 million to $15.4 million. Everspin says that price increases from its suppliers and expenses related to 28nm STT-MRAM development will reduce its earnings next quarter and the company will be breakeven or with a small profit.

A few months ago, Everspin Technologies launched a new family of SPI/QSPI/xSPI interface MRAM products that offer the world's highest performance persistent memory with full read and write bandwidth of 400 Megabytes per second through the new JEDEC expanded Serial Peripheral Interface (xSPI) standard interface. The EMxxLX family was launched with densities ranging from 8 Mbit to 64 Mbit.

Today Everspin announced a new xSPI MRAM device, the EM128LX, that expands the product line to 128Mbit.  Everspin says that the combination of increased density with up to 233 megabytes/second full read and write bandwidth means that system designers now have the option of merging code and data memory on the same device, reducing cost, power, and area.

Taiwan's Industrial Technology Research Institute (ITRI) announced two new MRAM collaborations. The first one is with Taiwan's TSMC, for the development of SOT-MRAM array chips. The second collaboration is with National Yang Ming Chiao Tung University (NYCU) to develop magnetic memory technology that can perform across a wide operating temperature range of nearly 400 degrees Celsius.

Together with TSMC, ITRI is developing low-voltage and current SOT-MRAM, that features high write efficiecny and low write voltage. ITRI says that its SOT-MRAM achieves a writing speed of 0.4 nanoseconds and a high endurance of 7 trillion reads and writes. The memory also offers a data storage lifespan of over 10 years.

Renesas announced that it has developed 22-nm embedded STT-MRAM circuit technologies. Renesas developed a test 32-megabit (Mbit) chip with an embedded MRAM memory cell array that achieves 5.9-nanosecond (ns) random read access at a maximum junction temperature of 150°C, and a write throughput of 5.8-megabyte-per-second (MB/s).

To achieve this performance, Renesas developed two technologies. The first is a fast read technology employing high-precision sense amplifier circuit, utilizing capacitive coupling. The second is a fast write technology, with simultaneous write bit number optimization and shortened mode transition time.

Integral Solutions International (ISI) announced a new 3-Axis Magnet Option for wafer-level testing. Combined with ISI's WLA5000 Tester, the 3D magnetic fields produced by this system can be used for characterization of MRAM devices in addition to 2D/3D Magnetic Sensors.

ISI says that for MRAM applications, the 3D Magnetic fields produced by ISI’s 3-Axis Magnet Option delivers solutions for both STT-MRAM and SOT-MRAM applications.

Everspin Technologies announced its financial results for Q4 2021. Revenues in the quarter came in at $18.2 million (up from $14.8 million in Q3 2021,and $10 million in Q4 2020). During the quarter, the company recognized $3.95 million in the IP monetization deal it signed in Q3 2021. The company reports Q4 positive net income of $3.7 million. Cash and equivalents at the end of the quarter increased to $21.4 million (up from $14.6 million in the end of 2020).

Everspin has seen excellent Toggle MRAM shipments and revenue, but the company's STT-MRAM was flat as its largest customer was also impacted by supply constraints (not related to Everspin). The company expects STT-MRAM revenue to remain flat for the new couple of quarters. It expects Q1 2022 revenues to be in the range of $13.4 million to $14.2 million.

Renesas Electronics announced that it has developed two new technologies that reduce the energy and voltage application time for the write operation of STT-MRAM chips.

On a 20-Mbit test chip with embedded MRAM memory cell array in a 16 nm FinFET logic process, a 72% reduction in write energy and a 50% reduction in the voltage application time were confirmed.

Researchers from Tohoku University managed to fabricate the world's smallest STT-MRAM MTJ, at 2 nm. In addition, the researchers demonstrated fast switching (3.5 ns) in sub-five-nm STT-MRAM MTJs.

The new MTJ were developed using a new multilayered ferromagnetic structure that can engineer characteristic relaxation time, which governs the magnetization dynamics in the ns regime.

Hprobe announced a new magnetic test head for MRAM Wafer Sort. The new module, the H3DM-XL, is at the heart of the latest addition to Hprobe’s IBEX line, the IBEX-WS.

The IBEX-WS test equipment integrates 3D magnetic field capabilities, while increasing field area and uniformity for wafer probing large MRAM arrays. It also features a unique patented robotized 3D Field Calibration Unit (FCU) for high-speed field mapping and monitoring.

pMTJ STT-MRAM developer Avalanche Technology announced that it has signed an agreement with LinearASICs Inc. to develop companion chiplets to offer a complete portfolio of Space Grade products with SPI and DDR interfaces, based on Avalanche's 1Gb Space Grade MRAM.

Avalanche's 2nd-Gen P-SRAM evaluation kit

LinearASICs will provide standalone serial interface chiplets such as Octal SPI (OSPI), as well as standard memory interface chiplets such as DDR. These chiplets will be available as standalone devices or integrated modules through Avalanche.