Keysight Technology announces a new MRAM test platform designed in collaboration with Tohoku University

Tohoku University's Center for Innovative Integrated Electronic System (CIES) announced that its collaboration with Keysight Technology has led to the release of a new MRAM test platform product, the NX5730A.

Kesight NX5730A Memory Test system photo

Keysight's NX5730A is a high-throughput 1 ns Pulsed IV memory test solution. Keysight says that this solution is a unique dedicated system for characterizing emerging devices such as magnetic tunnel junction (MTJ) on silicon wafers, accelerating the efficiency of device characterization and memory production testing.

A new method to control magnetism could lead to ultra-fast and more efficient MRAM chips

Researchers from UC Berkeley and UC Riverside developed a new ultra-fast method for electrically controlling magnetism in certain metals. The researchers say that this could be applied to future MRAM chips, to provide much faster write speeds and more efficient operation.

Ultrafast electrical magnetic switching (UCB + UCR)

The researchers built special circuits to study how magnetic metals respond to electrical pulses as short as a few picoseconds. The researchers found that in a magnetic alloy made up of gadolinium and iron, these fast electrical pulses can switch the direction of the magnetism in less than 10 picoseconds, orders of magnitude faster than any other MRAM technology.

Veeco: high volume manufacturing using our Ion Beam Etch systems to begin in 2018

Veeco developed an Ion Beam Etch system for MRAM production, and during the company's Q3 2017 conference call it updated on the new system.

Veeco MRAM IBE slide, Q3-2017

Veeco says that its Ion Beam technology is well suited for etching the multilayer magnetic stack used in MRAM chips. Veeco already placed systems at multiple customers and expect high volume manufacturing to start next year for embedded memory applications.

Spin Transfer Technologies and Tokyo Electron to co-develop next-gen STT-MRAM devices

Spin Transfer Technologies (STT) announced that it has signed an agreement with Tokyo Electron (TEL) to collaborate on the development of next-generation SRAM and DRAM-class STT-MRAM devices.

Spin Transfer Technologies says that the combination of its STT-MRAM technology with TEL’s advanced PVD MRAM deposition tool will allow the companies to quickly develop processes for the highest density and endurance devices.

A new European project aims to develop a system-level STT-MRAM exploration flow

The EU launched a new project called GREAT H2020 moderated by the CEA-Spintec laboratory that plans to co-integrate multiple functions like sensors, RF receivers and logic/memory together within CMOS thanks to a single baseline technology in the same System on Chip.

MAGPIE process image

One of the project’s final objectives is to develop a system-level simulation and design of a representative IoT platform, integrating this technology. To achieve it, a unique exploration flow is proposed: MAGPIE. MAGPIE stands for Manycore Architecture enerGy and Performance evaluation Environment and has been jointly developed and funded through GREAT and the CONTINUUM ANR French project.

Spin Transfer Technologies raised $22.8 million via a convertible bridge facility

Spin Transfer Technologies announced that it has raised $22.8 million via a convertible bridge facility. STT says that this will help the company get ready to complete its Series B funding round, targeting strategic investors and planned to conclude by end of Q1 2018.

In January 2017 STT announced that it has started to deliver fully functional ST-MRAM samples to customers in North America and Asia. The sample devices are based on the company's Orthogonal Spin Transfer Magneto-Resistive Random Access Memory technology (OST-MRAM), and use 80nm perpendicular magnetic tunnel junctions (MTJs)., the latest generation of MRAM technology.

Samsung to soon start mass producing 28nm embedded MRAM

Samsung logoDigitimes reports that Samsung Foundry will soon start mass producing MRAM chips using Samsung's 28nm fully depleted silicon-on-insulator (FD-SOI) process technology.

Digitimes says that Samsung has collaborated with NXP on this project. Samsung has completed the tape-out of its embededd MRAM which will be first applied to NXP's new low-power i.MX-series chipset targeted at automotive, multimedia and display panel applications.