The NEC Group focuses on two core areas of business: integrated IT / network solutions and semiconductor.
NEC has been developing MRAM technologies for a long time, collaborating with both TMSC and Toshiba. NEC are also working on perpendicular MRAM. NEC planned to commercialize pMTJ-based MRAM chips by 2010, but that plan did not materialize.
The latest NEC MRAM news:
NEC Corporation and Tohoku University have developed an MRAM based CAM (content addressable memory) that includes non-volatile storage by using the vertical magnetization of vertical domain wall elements in a cobalt-nickel active layer. They call this Spin-CAM.
NEC and Tohoku built a 16-kbit Spin-CAM prototype chip (using a 90-nm process). This chip features 5 ns search cycle time, 200-microamps write current and a 6.6 square micron memory cell. Such a CAM may be used to create instant-on electronics and zero-electricity standby modes.
There's an interesting article at Tech-On, by NEC, on their MRAM-based magnetic flip flip (MFF). NEC say that using such flip-flops can make low power 'standby' mode for appliances (TVs, computers, portable devices...).
Today, for example, LCD TVs have two kinds of standby - "fast standby" which consumes as much as 15W, and 'slow standby' that may consume as low as 0.1W, but may take a few seconds to show a picture when powered back on. The MFF might make it possible to design a stand-by mode that is both fast to power on, and uses minimal power.
NEC and NEC Electronics employed a new method called "spin torque domain wall displacement write method" to reduce write current and realize microfabrication at the same time. In fact, they aim to reduce the current by as much as 90%. They were also able to increase speed to 500Mhz. This technology is not 'new', it was announced in 2007, but now they have a test chip ready.
NEC announced that they have developed the world's first STT-MRAM with current-induced domain wall motion using perpendicular magnetic anisotropy material. Perpendicular magnetic anisotropy enables a cell to carry out the current-induced domain wall motion writing method using spin torque at a low current, which leads to easy scaling down of cell size and creates suitable conditions for next generation system LSI.
The newly developed current-induced domain wall motion writing method, using spin torque and perpendicular magnetization material, is capable of reducing current while writing for a scaled down cell beyond the 55 nanometer process.
Furthermore, compatibility with an asynchronous SRAM was achieved by inserting protocol transform circuits between the MRAM macro and I/O buffer circuits.
NEC has announced it managed to make a 1-bit Magnetic Flip Flop (MFF, as they like to call it). Unlike existing flip-flops, it does not need power to retain the value.
NEC suggests using such flip-flops instead of regular ones, and using MRAM instead of SRAM and you can make a system on a chip that does not need power to store data. MRAM is better than FLASH, says NEC, because of the unlimited write cycles.
NEC's MFF opereates at 1.2V or less, like regular flip-flops. The clock speed can be up to 3.5GHz.
Verification at the SRAM speed level proves that the newly-developed MRAM could be embedded in system LSIs as SRAM substitutes in the future.
Toshiba Corporation and NEC Corporation today announced that they have developed a magnetoresistive random access memory (MRAM) that combines the highest density with the fastest read and write speed yet achieved. The new MRAM achieves a 16-megabit density and a read and write speed of 200-megabytes a second, and also secures low voltage operation of 1.8V.
In an effort to someday profit off of the manufacturer of surface-conduction electron-emitter display or SED devices, Canon yesterday bought 53.9% of NEC Machinery and all of NEC Machinery’s shares in Anelva Corp., a subsidiary of NEC Corp. Anelva is a japanese company that manufactures major equipment for the fabrication of semiconductors and LCDs using vacuum technology. Anelva developed a 200- to 300-mm-wafer-compliant deposition (sputtering) equipment for MRAM, the C-7100, using their unique low-pressure plasma deposition technique.
MRAM has been considered as a potential next-gen memory technology for quite some time, and it was in the spotlight at the VLSI 2005 symposium. NEC and Toshiba jointly unveiled a new Toggle MRAM cell structure in which the magnetic tunnel junction has a multi-layered structured.
Fujitsu Laboratories presented a new approach to MRAM circuity. The company is developing embedded MRAM and they have now proposed a one-transistor/two-magnetic tunnel junction (1T/2MTJ) structure MRAM cell with a direct voltage-sensing scheme, which it said has the advantages of DRAMs. In the proposed 1T/2MTJ cell, two MTJs were connected in series. Fujitsu fabricated the test device with each MTJ measuring 0.2 x 0.4 micron and confirmed the cell operation.