Silicon Laude announces the availability of the world’s first multipurpose in-circuit emulator that can emulate not only Honeywell's HXNV0100 radiation hardened synchronous MRAM, but also Honeywell ASICs containing up to one million gates.
Dubbed the MRAMulator and measuring only 0.9” x 0.9” square, the in-circuit emulator is pin for pin compatible with, and has the same X/Y form-factor as, Honeywell's HXNV0100 MRAM in a 64-lead ceramic quad flat pack (QFP). The MRAMulator is multipurpose because, when not being used as an HXNV0100 emulator, it can be used as a very powerful IP development platform for implementing and testing logic designs in actual target hardware before conversion into a Honeywell radiation hardened ASIC. Among the IP available from Silicon Laude for use in the MRAMulator, and for later conversion into a Honeywell radiation hardened ASIC, is Silicon Laude's customizable MRAM8051 microcontroller Verilog RTL source code library.
Based on Actel's ProASIC3 A3P1000 FPGA and Freescale's MR2A16A 256 kword by 16-bit (35ns) MRAM, when configured as an HXNV0100 emulator, the MRAMulator is guaranteed to work in target hardware that complies with the synchronous timing specifications found in the Honeywell HXNV0100 synchronous MRAM data sheet. The MRAMulator can be used stand-alone as a temporary, development grade, HXNV0100 replacement and/or it can be used in combination with Domain Technologies BoxView debugger to create a very powerful debugging and testing platform.
When used with BoxView debugger, emulation MRAM can be examined and edited, onthe-fly, even while the target system is accessing the same memory location. Moreover, emulation MRAM can be up/downloaded from the host computer's hard drive, and its contents displayed in hex, decimal, ASCII, and floating point formats, and even plotted graphically, in real-time, effectuating an animated presentation of MRAM contents. With the optional real-time trace and timing analysis (RTTA) package installed, and by using it's four programmable trigger words, dual event counter, and 8-level event sequencer, up to 72 channels of state and timing analysis are available for selective capture of address, data, and control lines into the RTTA's 2 ksample trace buffer. To automate the complex testing and analysis process in the lab or out on the test floor, BoxView also comprises a very powerful scripting language that has the ability to automatically look for specific debug events and respond to them by spooling the trace buffer and/or emulation MRAM contents to the host computer's hard drive for later analysis.
The MRAMulator 100% compatible with STAPL device programming files created by Actel's Libero Gold FPGA development software, which can be downloaded for free at Actel's website. Because the device programmer is built into the MRAMulator hardware, a separate device programmer is not needed. Programming the MRAMulator's embedded FPGA is done via USB connection using the STAPL player GUI software that is shipped with each unit.
MRAMulators are available with and without the real-time trace and timing analysis (RTTA) package. Without RTTA, the single unit price is $650.00. With RTTA and BoxView debugger, the single unit price is $2,400.00. Both versions are available from stock and shipped complete with MRAMulator, USB communications adaptor, and CD containing the STAPL player software, original HXNV0100 emulator design STAPL file, and example functional MRAM8051 STAPL file with MRAM8051 Designer's Reference.