In a conventional MRAM design scheme, writing these elements uses two crossed pulse currents to produce a synthesized magnetic field to reverse selected magnetic elements, and the read process relies on the tunneling magneto-resistance (TMR) ratio.
Instead of using this traditional MRAM design, the CAS researchers have used nanometer-scale ring-shaped magnetic tunnel junctions (NR-MTJs), to contain the 1s or 0s — a return to magnetic-core memory formats of 1960s replicated on the nanoscale. The inner- and outer diameter of the memory rings is around 50-nm and 100-nm, respectively. The memory cell employs positive and negative pulsed currents to drive the rotation of magnetic moment on a bit plane, CAS said in a statement.
The research team claimed its design could reduce MRAM energy consumption and memory cell size compared with existing designs; two challenges facing MRAM development. About 500 to 650 microamperes of current is needed for a device cell to perform a write operation, and 10 to 20 microamperes current is used to read the cell, CAS said. After further improvement, it is expected to decrease the writing current to the range of 100 to 200 microamperes.