MRAM research or technical information

Tohoku University develops ultra-small (<10nm) MTJs

Researchers from Tohoku University developed new ultra-small (single-digit nanometer scale) magnetic tunnel junctions (MTJs) that have sufficient retention properties and yet can be switched by a current.

Shape anisotropy and interfacial anisotropy MTJs (Tohoku University)

Tohoku University developed 20-nm CoFeB/MgO-based MTJs in 2010, in which an "interfacial anisotropy" at the CoFeB/MgO interface was utilized. But these will not work at under 20-nm. The researchers now used a "shape anisotropy" to achieve the smaller MTJs.

Keysight Technology announces a new MRAM test platform designed in collaboration with Tohoku University

Tohoku University's Center for Innovative Integrated Electronic System (CIES) announced that its collaboration with Keysight Technology has led to the release of a new MRAM test platform product, the NX5730A.

Kesight NX5730A Memory Test system photo

Keysight's NX5730A is a high-throughput 1 ns Pulsed IV memory test solution. Keysight says that this solution is a unique dedicated system for characterizing emerging devices such as magnetic tunnel junction (MTJ) on silicon wafers, accelerating the efficiency of device characterization and memory production testing.

A new method to control magnetism could lead to ultra-fast and more efficient MRAM chips

Researchers from UC Berkeley and UC Riverside developed a new ultra-fast method for electrically controlling magnetism in certain metals. The researchers say that this could be applied to future MRAM chips, to provide much faster write speeds and more efficient operation.

Ultrafast electrical magnetic switching (UCB + UCR)

The researchers built special circuits to study how magnetic metals respond to electrical pulses as short as a few picoseconds. The researchers found that in a magnetic alloy made up of gadolinium and iron, these fast electrical pulses can switch the direction of the magnetism in less than 10 picoseconds, orders of magnitude faster than any other MRAM technology.

A new European project aims to develop a system-level STT-MRAM exploration flow

The EU launched a new project called GREAT H2020 moderated by the CEA-Spintec laboratory that plans to co-integrate multiple functions like sensors, RF receivers and logic/memory together within CMOS thanks to a single baseline technology in the same System on Chip.

MAGPIE process image

One of the project’s final objectives is to develop a system-level simulation and design of a representative IoT platform, integrating this technology. To achieve it, a unique exploration flow is proposed: MAGPIE. MAGPIE stands for Manycore Architecture enerGy and Performance evaluation Environment and has been jointly developed and funded through GREAT and the CONTINUUM ANR French project.

Samsung demonstrates a 8Mb embedded pMTJ STT-MRAM device

Samsung demonstrated an LCD display that uses a tCON chip that uses embedded 28nm pMTJ STT-MRAM memory, instead of the normally used SRAM. The MRAM device had a density of 8Mb and a 1T-1MTJ cell architecture. The cell size is 0.0364 um2.

Samsung LCD tCON Demo (IEDM-2017)

A tCON chip is a timing controller chip that processes the video signal input and processes it to generate control signal to the source & gate driver of the LCD display. The memory is used a a frame memory which stores previous frame data. Samsung prepared a test chip that contains both SRAM and MRAM memory devices to show that there is no difference between the two. SRAM replacement is a popular MRAM application.

IMEC researchers demonstrate the world's smallest pMTJ at 8nm

Researchers at IMEC developed a 8nm perpendicular magnetic tunnel junction (pMTJ) with 100% tunnel magnetoresistance (TMR) and a magnetic coercive field up to 1,500 Oe in strength. The researchers also demonstrated integrated 1Mbit STT-MRAM 1T1MTJ arrays with pitches down to 100 nm.

IMEC says that this is the world's smallest pMTJ - which paves the way for high density stand-alone MRAM applications. The pMTJ was developed on 300mm silicon wafers in a production process that is compatible with the thermal budget of standard CMOS back-end-of-line technology.

The EU-funded GREAT project presents its first hybrid CMOS-MRAM 180nm tape out

GREAT Project logoIn 2015, the EU launched the GREAT project, with an aim to co-integrate multiple functions like sensors, RF receivers and logic/memory together within CMOS by adapting STT-MTJs to a single baseline technology in the same system on chip. GREAT stands for heteroGeneous integRated magnetic tEchnology using multifonctionnal stAndardized sTack.

The project partners now announced the first hybrid CMOS/MSS-MRAM Tape Out with Israel-based Tower Jazz. This hybrid integrated circuit uses the 180nm CMOS process from Tower and an academic MRAM post-process that will be done by CEA Spintec within their facilities.

Researchers developed a spin-orbit torque based device, an alternative to STT

Researchers from the Trinity College in Dublin developed a new device using a stack of five metal layers (including a platinum layer and an iron-based layer) that can be used to control the spin of electrons - using "spin–orbit torque", or SOT, an alternative to spin-transfer torque (STT) - but without an external field.

SOT switching without an eternal field (TCD)

The basic idea is that when a current is run through the platinum, the electrons split into two groups by their spin (that's the SOT effect). Electrons are inserted into the iron-based "storage layer" and the spin of those electrons can be changed. The rest of the layers act like a thin-film magnet which helps determine the spin of the electrons.

NUS researchers developed the world's first bendable MRAM device

Researchers from the National University of Singapore (NUS) developed what they say is the world's first flexible (bendable, actually) MRAM device. Flexible OLED displays are already entering the market, and now researchers are developing other flexible components, which will be needed if truly bendable and flexible devices are to be possible.

Flexible MRAM device, NUS 2016

The researchers used a new fabrication method, that enabled them to deposit the magnetic memory on a plastic substrate, and not a silicon one. This was achieved following a two-year collaboration with Yonsei University, Ghent University and Singapore's Institute of Materials Research and Engineering.