Spin Memory (previously Spin Transfer Technologies) announced that it has developed a new innovative technology, called the Universal Selector, which will significantly improve the capabilities of existing and emerging memory technologies (including MRAM, DRAM and ReRAM) as it enables a novel way to design vertical cell transistors which achieves higher levels of performance, reliability and density.

MRAM by Spin Memory photo

Spin Memory’s Universal Selector is a selective, vertical epitaxial cell transistor whose channel has a low enough doping concentration that it operates in full depletion. For MRAM memory, the Universal Selector enables manufacturers to create 1T1R memory bitcells of 6F2 – 10F2 (6F2 – 10F2), enabling manufacturers to embed up to five times more memory in the same area footprint with minimal additional wafer processing costs.

Spin Memory says that the Universal Selector is the first true industry solution to the DRAM problem of row hammer disturbs, while simultaneously reducing Soft Error Rates (SER) and leakage.

The company says that the fully depleted cell transistor along with other unique process and device features leads to a crucial architectural change, allowing the channel to be completely electrically isolated from the silicon substrate. This completely eliminates the possibility of any trapped or migrating electrons causing row hammer, making this design row hammer-immune.



Spin Memory recently raised $8.3 million in an extension to its Series B funding.

Tags: