Everspin announced a restructuring plan to reduced expense and achieve breakeven in 2020

Everspin Technologies announced that the company will undergo a restructuring plan designed to reduce annual operating expenditures and achieve quarterly cash flow breakeven this year. At the end of January the company will reduce its headcount - an approximately 15% reduction of the workforce.

Everspin also announced that it reaffirms its Q4 2019 revenue guidance of $9.3 million to $9.7 million.

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New USMR MRAM structure promises extremly simple design

Researchers from Tokyo's Institute of Technology (Tokyo Tech) developed a new MRAM cell structure (called USMR MRAM) that features a very simple structure with only two layers - which could hopefully enable lower-cost MRAM devices.

USMR MRAM cell structure image

The new design uses a combination of a topological insulator with a ferromagnetic semiconductor which enables a giant unidirectional spin Hall magnetoresistance (USMR).

New super-lattice SL-STT-MRAM enable faster and more efficient memory architecture

Researchers from the National Taiwan University developed a new ultra low power STT-MRAM architecture, called Super Lattice STT-MRAM, or SL-STT-MRAM. The researchers say that SL-STT-MARM simultaneously achieves ultra-high MR ratio, high-speed switching, and low RA.

SL STT MRAM structure

An SL-STT-MRAM is based on an SL-STT-MTJ, which uses a superlattice barrier to replace the single crystalline (MgO) barrier in traditional STT-MTJ. The superlattice barrier is made of alternating metal and insulator layers, in which only amorphous rather than single crystalline is used in the insulator. The SL-STT-MRAM features higher reliability for repeated writing than compared to traditional MgO based STT-MRAM.

Mentor to provide IC test solutions for Arm's eMRAM compiler IP

Mentor announced that it will provide a unique IC test solution for the Arm's eMRAM compiler IP which is built on Samsung Foundry’s 28nm FDSOI process technology.

Mentor says it is working with Arm to leverage industry-leading Tessent software Built-In Self-Test (BIST) Design-for-Testability (DFT) technologies for testing the next-generation of Arm's eMRAM compiler IP in development.