Toshiba

Toshiba has a new hybrid cache design that uses STT-MRAM and SRAM combination. This is aimed towards next-generation low-power computer processors. These new computers will usually be off, and the time and power it takes to "wake up" is considerable. The new design can reduce the energy consumption by around half - and does not effect processing capacity.

Toshiba's design uses a 512Kb STT-MRAM cache combined with a 32Kb register file and a 64Kb SRAM primary cache. Using the non-volatile MRAM, the power gating can be conducted more frequently. In current designs, it takes around 20 micro seconds to recover from power gating and about 150 micro seconds from deep-sleep mode. In the new design, it takes only 1 micro second to recover from power gating.

Kiyoshi Kobayashi, president of Toshiba's Semiconductor and Storage Products Company, said that "MRAMs will make it possible to take further advantage of NAND flash memories and HDDs, whose access performances are low,". It seems that Toshiba plans to use MRAM as cache for both NAND and HDDs devices.

Toshiba hasn't given up on the idea of having a full MRAM memory device - replacing HDD/NAND/DRAM altogether, but using it as a cache can be a step towards this goal.

Toshiba and Hynix announced an agreement to jointly develop MRAM products. Once the development is complete, the companies intend to establish an MRAM production plant together. We believe the companies intend to develop STT-MRAM technology.

Toshiba has been developing STT-MRAM for quite some time, and just a few days ago reported a breakthrough MTJ device that could pave the way towards Gigabit MRAM devices. They expect such chips within 3-4 years, so that's probably the same time frame on the new JV with Hynix.

Toshiba says that their newly developed perpendicular magnetization-type magnetic tunnel junction (MTJ) device has excellent properties - and it can be a basic element towards a gigabit STT-MRAM device. The company says that these 'research results' are encouraging and they will now shift to the development of products. Commercialization of gigabit STT-MRAM is expected within 3 to 4 years.

MTJ cross section (Toshiba)

The device's writing current density is 5 x 10⁵Acm^-2, which is 1/6 that of the company's existing products. And its magnetic resistance (MR), which determines data reading margin, is 200%, which was drastically improved from the 15% of the existing products. Toshiba managed to have both a low writing current density and a high MR ratio by using cobalt and iron based materials for the recording layer.

Toshiba is still working on 1Gb MRAM chips, and it's "almost ready". They are using Spin-RAM (STT-RAM), like IBM.

Toshiba's projections sees MRAM taking over DRAM in 2015.

Read more here (TechRadar) 

In making these major advances, Toshiba applied and proved the spin transfer switching and perpendicular magnetic anisotropy (PMA) technologies in a magnetic tunnel junction, which is a key component in the memory cell.

Toshiba Corporation and NEC Corporation today announced that they have developed a magnetoresistive random access memory (MRAM) that combines the highest density with the fastest read and write speed yet achieved. The new MRAM achieves a 16-megabit density and a read and write speed of 200-megabytes a second, and also secures low voltage operation of 1.8V.