Samsung

Samsung developed a perpendicular MTJ element using 17nm technology - the world's smallest. This paves the way towards sub-20nm STT-MRAM. Up until now it was believed that to create such a small P-MTJ you will have to use a multi-layer structure and a rare-earth material for the ferromagnetic electrode. Samsung however used regular materials and structure (Ta/CoFeB/MgO/Ta) and optimized the oxidation process for the tunnel insulator (MgO).

By increasing the anisotropic energy on the joint interface the perpendicular magnetization of the ferromagnetic electrode was stabilized. Samsung reports a thermal stability factor of 34, a TMR ratio of 70% and a writing current of 44microampere with a perpendicular magnetization MTJ element whose cross-section area is 17 x 40nm. There is still room for improvement in the thermal stability factor in order to achieve over 1Gbit capacity at 20nm. This can be realized by making more improvements to the newly developed oxidation process for the tunnel insulator

Samsung announced that it has acquired Grandis, developer of STT-MRAM technology. We do not have any financial details yet, but Grandis' CEO Frahad Tabrizi said that this deal serves as a& "very successful exit" for Grandis's investors. Grandis raised $15 million since it was founded in 2002 (and also raised about the same from DARPA grants including a $8.6 million second-phase project granted in June 2010).

Grandis licensed their technology to several companies. We know that Hynix licensed it in 2008. The company was also collaborating with Renesas technologies. Hynix and Grandis were developing a compact in-plane MTJ based STT-RAM device that uses modified DRAM processes at 54nm.

During the International Electron Device Meeting (IEDM) exhibition we got some updates about STT-MRAM research done at IBM, Samsung and Hynix-Grandis (who are researching STT-MRAM together).

IBM is working together with TDK and has presented a new 4-kbit perpendicular STT-MRAM array using tunnel junctions. Samsung has presented an on-axis MRAM with a novel MTJ, which they say open he way towards sub-30nm scaling. Using ferromagnetic electrode and a different MTJ structure design, Samsung think that they can scale this to a sub-20nm level.

The Korean Government has decided to fund STT-RAM research for Hynix and Samsung in a $40 million project. The government will pay around half of the sum for the project, which is intended to run till 2014. The project calls for the government to work with Samsung and Hynix together for research and development on STT-MRAM chips. Korea aims to control around 45% of the 30-nano type memory chip market by 2015.

The companies have already opened a new laboratory at Hangyang University's fusion technology center. It is already equipped with a fully operational 300mm magnetic thin film deposition system and other chip-making facilities.

Via YonHap news

Samsung Electronics announced today that it has begun production of 512Mb Phase-Change Memory (PRAM). It is targeted for mobile devices. It features high-performance and low power. Samsung says that a handset with PRAM can extend its lifetime over 20%.

The 512Mb PRAM can erase 64KWs (kilowords) in 80ms, said to be over 10 times faster than NOR Flash memory. In data segments of 5MBs, PRAM can erase and rewrite data approximately seven times faster than NOR Flash.

Via TechOn

Samsung and Hynix have started to work on 30-nano STT-RAM. They hope to have chips out by the end of the year (probably samples only...). It appears that the Korean government is helping to fund the project. Details are a bit sketchy, we only have the information in Korean.

Samsung and Hynix are to launch their STT-RAM JV in September (after having announced their intentions in January 2008).