Grandis

Samsung announced that it has acquired Grandis, developer of STT-MRAM technology. We do not have any financial details yet, but Grandis' CEO Frahad Tabrizi said that this deal serves as a& "very successful exit" for Grandis's investors. Grandis raised $15 million since it was founded in 2002 (and also raised about the same from DARPA grants including a $8.6 million second-phase project granted in June 2010).

Grandis licensed their technology to several companies. We know that Hynix licensed it in 2008. The company was also collaborating with Renesas technologies. Hynix and Grandis were developing a compact in-plane MTJ based STT-RAM device that uses modified DRAM processes at 54nm.

During the International Electron Device Meeting (IEDM) exhibition we got some updates about STT-MRAM research done at IBM, Samsung and Hynix-Grandis (who are researching STT-MRAM together).

IBM is working together with TDK and has presented a new 4-kbit perpendicular STT-MRAM array using tunnel junctions. Samsung has presented an on-axis MRAM with a novel MTJ, which they say open he way towards sub-30nm scaling. Using ferromagnetic electrode and a different MTJ structure design, Samsung think that they can scale this to a sub-20nm level.

Grandis has been awarded a new contract from DARPA to use their spintronics and magnetic-material expertise and develop non-volatile spin logic applications: which promises non-volatile, ultra-fast, radiation-hard and radically lower power consumption.

Development work will focus on integrating magnetic tunnel junction (MTJ) materials capable of sensing very small magnetic fields with nano-magnets performing logic operations. The goal is to demonstrate non-volatile spin logic circuits operating at ultra-fast speeds of less than 1 nanosecond and ultra-low power consumption of less than 10 atto-Joules per operation. Such performance coupled with the inherent non-volatility of spin logic devices will enable not just significant reductions in the active power consumption of microprocessors but also the virtual elimination of standby power consumption.

Mohamad Krounbi, Hitachi GST's general manager and VP of engineering has left Hitachi to join Grandis. Mohamad will be Grandis Senior VP for engineering.

Grandis has been recently awarded a $8.6 million project for STT-RAM chip development from US's DARPA.

The US Defense Advanced Research Projects Agency (DARPA) has awarded Grandis with a $8.6 million 2nd phase project for STT-RAM chip development. The first phase ($6.0) was received in October 2008.

Phase 2 will focus on test of verification of STT-RAM integrated memory arrays.

The final day of the Flash Memory Summit started with a panel on new memory technologies.

Crocus Technologies presented their TAS MRAM design which is targeted at SRAM and flash applications. Their product compared to SRAM at a 25% smaller cell, adding Non-Volatile capability, and a zero standby current.  The product compared to NAND flash by having a smaller cell and only 1X area overhead for controlling circuitry. It is currently being built on a 130nm node and can be scaled. It is targeted at Cache memory, data logging, medical instrumentation, casino gaming and industrial control applications.  They are targeting several business models - selling the standard product ICs, licensing IP a process technology licensing service and providing a foundry service.

Grandis today announced their 300-millimeter magnetic tunnel junction (MTJ) fabrication facility (Fab) in the US dedicated to STT-RAM. Grandis is now able to incorporate STT-RAM into its customers' most advanced semiconductor processes on 300mm wafers.