Technical / Research

MRAM research or technical information

Interview with Barry Hoberman, Crocus' chief marketing officer

Barry Hoberman photoCrocus is a startup company that develops MRAM technology - and recently they have announced several exciting advances in both their technology and their financing and production plans. We had the good chance to interview Barry Hoberman, Crocus' chief marketing officer.

Q: Barry, thanks for agreeing to answer our questions... The big story today is still RUSNANO's $125 million investment - announced in May 2011. Any updates on this deal? Have the construction begun on the Russian plant?

A: The site selection for our Russian plant (Crocus Nano Electronics) has been completed. The site contains an existing shell, which will be modified to support the clean room. Crocus expects to process wafers at this facility in 2013.

Crocus and SMIC to develop and produce MLU chips for automotive applications

Crocus logoCrocus signed a technology development and wafer manufacturing agreement with China's Semiconductor Manufacturing International Corp. (SMIC). The two companies will develop high-temperature Magnetic Logic Unit (MLU) technology targeted at automotive applications. The base wafer processing will be done by SMIC and these wafers will be further processed by Crocus at a facility that has yet to be built in Russia.

In addition the MLU technology could be licensed to SMIC for use in embedded chip applications and the two companies plan to market jointly smart cards made using TAS MLU and MRAM technology.

Samsung developed a perpendicular MTJ at 17nm

Samsung developed a perpendicular MTJ element using 17nm technology - the world's smallest. This paves the way towards sub-20nm STT-MRAM. Up until now it was believed that to create such a small P-MTJ you will have to use a multi-layer structure and a rare-earth material for the ferromagnetic electrode. Samsung however used regular materials and structure (Ta/CoFeB/MgO/Ta) and optimized the oxidation process for the tunnel insulator (MgO).

Samsung 17nm MTJ element photo

By increasing the anisotropic energy on the joint interface the perpendicular magnetization of the ferromagnetic electrode was stabilized. Samsung reports a thermal stability factor of 34, a TMR ratio of 70% and a writing current of 44microampere with a perpendicular magnetization MTJ element whose cross-section area is 17 x 40nm. There is still room for improvement in the thermal stability factor in order to achieve over 1Gbit capacity at 20nm. This can be realized by making more improvements to the newly developed oxidation process for the tunnel insulator

Morpho to develop smartcards based on Crocus' Magnetic-Logic-Unit (MLU) technology

IBM LogoCrocus logoCrocus announced that Morpho plans to develop smartcards based on Crocus' Magnetic-Logic-Unit (MLU) technology. The two companies signed an agreement under which Crocus will develop an MLU-based secure microcontroller which Morpho will integrate into its smart card products. The secure microcontroller product will be compliant with the latest quality and security standards.

According to Crocus, MLU technology (which is an adaption of thermally-assisted magnetic switching, or TAS, for use in memory access in addition to storage) offers the advantage of much higher read-write cycle endurance, compared with leading-edge flash memory, while also offering inherent non-volatility and low power operation. The use of MLU should also provide match-in-place capability, which can be used for secure authentication.

Toshiba designed an STT-MRAM/SRAM hybrid cache for ultra-low power processors

Toshiba has a new hybrid cache design that uses STT-MRAM and SRAM combination. This is aimed towards next-generation low-power computer processors. These new computers will usually be off, and the time and power it takes to "wake up" is considerable. The new design can reduce the energy consumption by around half - and does not effect processing capacity.

Toshiba MRAM/SRAM cache diagram

Toshiba's design uses a 512Kb STT-MRAM cache combined with a 32Kb register file and a 64Kb SRAM primary cache. Using the non-volatile MRAM, the power gating can be conducted more frequently. In current designs, it takes around 20 micro seconds to recover from power gating and about 150 micro seconds from deep-sleep mode. In the new design, it takes only 1 micro second to recover from power gating.

Flexible RRAM on plastic developed at KAIST

Researchers from the Korea Advanced Institute of Science and Technology (KAIST) developed new flexible non-volatile resistive random access memory (RRAM) on plastic. The team used memristors integrated with high-performance single-crystal silicon transistors.

KAIST flexible RRAM photo

This is the first time such a flexible memory is achieved. Bending memory cells causes cell-to-cell interference. To solve this problem, you have to integrate transistors. But most transistors built on plastic substrates (organic/oxide transistors) are not capable of achieving the sufficient performance level with which to drive conventional memory. The new single-crystal silicon transistors used by KAIST solve this issue.

Micron and A*STAR to jointly develop high density STT-MRAM

Micron and the A*STAR Data Storage Institute (DSI) from Singapore announced that they will jointly develop STT-RAM. The two companies will invest in a 3-year joint-research program to develop high-density STT-MRAM devices.

Years ago Micron had an active MRAM program which was scarpped in October 2004. It's great to see them re-enter MRAM research. Scott DeBoer, Micron Vice President of Research and Development said that Micron is "actively working on multiple emerging memory development programs" - and this collaboration is seen as a way to "explore the potential of STT-MRAM"


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