MRAM production

Magsil finally out of stealh-mode, plans to make 1Mb MRAM chips soon

MagSil has been working on MRAM since 2004, but we had very little information about the company till now (except for a PR from 2009 in which they said they'll soon reach full-scale commercialization). Today they have finally revealed more information. They are developing MRAM based on Magnetic Recording (iMR) cell architecture, based on a traditional magnetic tunnel junction (MTJ) scheme.

The company hopes to start making a standalone 1Mb MRAM device (based on 130- and 90-nm processes) "pretty soon". They also have plans for a 64Mb chip.

The technology was originally developed by MIT and exclusively licensed to Magsil. They have filed several suits against companies over hard disk drive components using tunneling magnetoresistive (TMR) technology and have reached settlements with Western Digital, Seagate, SAW Magnetics and Headway Technologies. Litigation is still ongoing with Hitachi and Shenzen ExcelStor technology.

08/20/2010

Aeroflex licenses MRAM technology from Everspin, to make memory solutions for aerospace and defense applications

Aeroflex Colorado Springs has licensed MRAM technology from Everspin for the development of HiRel nonvolatile memory solutions for aerospace and defense applications. Aeroflex will develop 4Mb and 16Mb MRAM monolithic solutions with guaranteed total ionizing dose and single event effect hardness. Aeroflex envisions HiRel MRAM solutions being used with microprocessors, DSP engines, storage systems, instruments, and reconfigurable FPGAs that require guaranteed total ionizing dose and single event hardness.

Aeroflex’s MRAM roadmap includes a family of -55oC to +125oC, QML products offered in ceramic packages per a Standard Microcircuit Drawing (SMD). As a replacement for 3.3 volt asynchronous SRAM, Aeroflex products will be 8-bit parallel I/O solutions in densities of 4M, 16M, and 64Mbit. All products are designed to operate from a single 3.3 volt supply. With data retention after each write of 20 years and infinite read/write endurance, Aeroflex MRAM products are ideal for working memory applications that require high rates of data overwrites.

07/19/2010

The world's first MRAM-based FPGA is ready for production

Menta SAS and LIRMM (The Montpellier Laboratory of Informatics, Robotics, and Microelectronics) has confirmed the tape out of world’s first MRAM-based FPGA. The FPGA is based on Menta's eFGPA Core programmable logic architecture and on CEA-LETI and Crocus's MRAM technology. It is manufactured in CMOS 130nm with magnetic junction in 120nm and provides capacity of 1,444 LUT4, equivalent to approximately 20K logic gates.

Pr Lionel Torres, in charge of the MRAM design project at LIRMM, says that “MRAM-based FPGA proposes better versatility with partial or dynamic re-configurability capabilities, instant on/off total or partial energy saving”.

06/09/2010

Crocus to sample 1-Mbit MRAM at the end of 2010, pricing it at "market price"

Yesterday Crocus has announced a new CEO (Dr. Bertrand F. Cambou) and an 8 million euro investment. Last year we spoke with their previous CEO (Jean-Pierre Braun), and now Dr. Bertrand was kind enough to answer a few questions we had.

Q: The original plan was to release products towards the end of 2009. What's the new target date?
End of 2010 for sampling, mid 2011 for revenue.

Q: Can you tell us a bit more about these products?
At first it will be NV-SRAM 1Mbit. Then we will expand to a family 256Kb-4Mb. We will price it at market price.

Q: When we talked to Jean-Pierre, he estimated the applying the technology for STT-RAM (in 45-60nm) will take at least 4-5 years. What's your view on that?
In my view point the current technology has leg, and will be integrated into CMOS logic all the way to 45nm. STT-TAS will take the relay at 32nm and under within 4-5 years.

Q: Where does he see Crocus' products used in the first few years?
Beside NV-SRAM, Crocus technology should be integrated into logic for embedding memory (replacing SRAM & Flash) into MCU. There is also the opportunity to replace the fuse on SRAM based FPGA to offer re-programable FPGA.

Q: Will Crocus require another round of finance, or do you hope that you can break-even soon?
We will look at strategic corporate partners interested by Crocus technology: NRE/ advance payment on Royalties/ low dilution.....

Dr. Bertrand - thanks again for answering our questions... good luck to both you and Crocus!

05/05/2010

Crocus raised €8 million, changes CEO

Crocus announced an 8 million euro investment, and a change of CEO. The new CEO is Dr. Bertrand F. Cambou. His main task is to bring their MRAM products to the market. Crocus aims to complete the production transfer of its 130nm MRAM technology to manufacturing partner Tower Semiconductor soon.

Crocus has originally planned to start production towards the end of 2009.

05/04/2010

Everspin introduces new 16 Mbit MRAM chips

Everspin has announced a new MRAM chip (MR4A16B) with 16-megabit (Mb) density. Samples are available now, and mass-production will begin in July 2010. There are two options for the chips: commercial chips and industrial chips (that have a larger temperature range: -40°C to +85 °C). Everspin also promises to continue and deliver MRAM at increasingly higher densities.

Everspin MR4A16B

This is the first time since the MRAM chips were introduced by Freescale in 2006 that they announce higher-density chips.

The MR4A16B is a 3.3-volt, parallel I/O chip that features fast 35 ns access times with unlimited read/write cycles. Data is always non-volatile after each write for more than 20 years. In addition, MRAM is immune to soft error rates associated with cosmic rays that impact other memories. The 16Mb MRAM is organized as 1,048,576 words of 16 bits. Pin and function-compatible with asynchronous SRAM, the MR4A16B targets industrial automation, robotics, network and data storage, multi-function printers and a host of other systems traditionally limited to SRAM-based designs.

04/18/2010

NVE updates on Anti-Tamper MRAM research

NVE says that they have completed several custom anti-temper MRAM integrated circuit designs. NVE designs conventional semiconductor ICs which they fabricate at outside foundries. Then they add the Spintronic structures, in this case spin-dependent tunnel junction memory cells, in their own factory.

NVE now reveals that they have received a number of the foundry wafers they have designed and they are in the process of adding MRAM to the wafers. The prototypes look promising so far although a fair amount of development remains before production.

01/22/2010