Competing technologies

Elpida and Qimonda are discussing joint development of Phase-change RAM (PRAM) and also magneto-resistive RAM (MRAM) together with other potential technologies such as Si through-hole electrode technology. The two DRAM-making companies are talking about a merger.

In two papers published in the April 11 issue of Science, IBM Fellow Stuart Parkin and colleagues at the IBM Almaden Research Center in San Jose describe both the fundamentals of a technology dubbed "racetrack" memory as well as a milestone in that technology. This milestone could lead to electronic devices capable of storing far more data in the same amount of space than is possible today, with lightning-fast boot times, far lower cost and unprecedented stability and durability.

Within the next ten years, racetrack memory, so named because the data "races" around the wire "track," could lead to solid state electronic devices - with no moving parts, and therefore more durable - capable of holding far more data in the same amount of space than is possible today. For example, this technology could enable a handheld device such as an mp3 player to store around 500,000 songs or around 3,500 movies - 100 times more than is possible today - with far lower cost and power consumption. The devices would not only store vastly more information in the same space, but also require much less power and generate much less heat, and be practically unbreakable; the result: massive amounts of personal storage that could run on a single battery for weeks at a time and last for decades.

It aims to produce a next-generation memory chip called Phase-change Random Access Memory (PRAM) by 2009. Industry analysts expect it to become the main memory device, replacing high-density flash memories, within the next decade.

Research and Markets has announced the addition of the Frost & Sullivan report: Advances in Embedded Memories to their offering.

Fujitsu's MB85R2001 and MB85R2002 feature non-volatile memory with high-speed data writing, low power consumption and the ability to provide a large number of write cycles.

Intel Corp. has revealed a prototype PRAM (phase change RAM) wafer, long under development, at IDF Spring 2007 in Beijing, China, which began on April 16, 2007. At the keynote speech, Intel's CTO Justin Rattner announced, "the company will start mass-production of PRAM as early as the second half of 2007." He also said, "We consider replacing NOR flash memory with PRAM first, but that's not our goal. PRAM may possibly replace DRAM in the near future. We are paying a lot of attention to the technology."

Fujitsu today announced the availability of its 2 Mbit Ferroelectric RAM (FRAM or FeRAM) memory chips, which the company claims is the largest capacity FRAM in volume production in the world. The memory product have the same electrical characteristics and use the same TSOP-48 package as Fujitsu's 1 Mbit FRAM products, equating to double the capacity over previous chips. Sampling price of the chips is set at 2,000 Yen ($16.91 USD).

Intel's chief technology officer Justin Rattner is set to give the first public demonstration of the company's PRAM (phase-change RAM) technology at this week's Intel Developer Forum (IDF) conference.

Intel's new phase-change memory technology, called PRAM by Intel and PCM by others who are working on the same type of memory, is set to sample in the first half of this year. Intel says they plan to ship the first PRAM modules as a straight-ahead NOR flash replacement so that they can work the kinks out of the design before trying to move it up the memory hierarchy. The company claims a much higher number of read-write cycles (100 million) than flash, as well as a potential 10 years' worth of data retention.

In addressing the need for next-generation high-density on-chip non-volatile memory Technology, Hitachi, Ltd. and Renesas Technology Corp. today announced the development of a 512-kbyte (4-Mbit equivalent) phase change memory module operating at a 1.5-V power supply voltage, which achieves 416-kbyte/sec high-speed write and read speeds with a 20-nanosecond access time. Using the previously developed "low-power phase change memory cells" with a 100-uA (micro(2)-ampere) write current, the two companies developed a peripheral circuit Technology to enable the high-speed write and read operations.