GrandisHitachi's VP of engineering moves to Grandis
Grandis has been recently awarded a $8.6 million project for STT-RAM chip development from US's DARPA.
Grandis awarded $8.6 million from DARPA for a 2nd phase STT-RAM research project
Phase 2 will focus on test of verification of STT-RAM integrated memory arrays.
Crocus and Grandis present their MRAM tech at the Flash Memory Summit 2009
Crocus Technologies presented their TAS MRAM design which is targeted at SRAM and flash applications. Their product compared to SRAM at a 25% smaller cell, adding Non-Volatile capability, and a zero standby current. The product compared to NAND flash by having a smaller cell and only 1X area overhead for controlling circuitry. It is currently being built on a 130nm node and can be scaled. It is targeted at Cache memory, data logging, medical instrumentation, casino gaming and industrial control applications. They are targeting several business models - selling the standard product ICs, licensing IP a process technology licensing service and providing a foundry service.
Grandis Opens New Fabrication Facility for STT-RAM
Grandis Awarded DARPA Contract To Develop STT-MRAM
Hynix licenses Grandis' STT-RAM technologyHynix and Grandis have also entered into a collaborative agreement to jointly integrate Grandis' STT-RAM technology into Hynix' future memory products.
Grandis gets new CEO, says will be soon ready to go to market
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