Imec and Tokyo Electron to collaborate on STT-MRAM R&D
TEL installed a Tactras etch tool at imec's 300mm clean room. This enables imec and TEL to jointly develop the patterning processes for high-density STT-MRAM technology. The Tactras is designed for in-situ cluster patterning of the Magnetic Tunnel Junction (MTJ) stack, which is key for advanced memory technology nodes. Earlier today Imec announced it will also enter in an STT-MRAM R&D program with Canon Anelva. It's great to see this large research center accelerating its STT-MRAM development. Source: imec
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