Researchers from A*STAR have posted an interesting study about STT-RAM production process. In particular, they say that it's already known that the annealing temperature controls the change in resistance between parallel and anti-parallel magnetizations. The higher the annealing temperature, the better larger the resistance change - but if the temperature is too high it drops.
The researchers now looked at an entire cell, and found out that the annealing temperature that yielded the maximum resistance variation exceeded the temperature necessary for maximum thermal stability.
The researchers also found that the minimum current density necessary to change the film magnetization increased with annealing temperature. A lower current is desirable for practical cell operation. The current density could be lowered by reducing the thickness of the magnetic films. However, lower thicknesses also produced an undesirable reduction in resistance variation.
Both of these findings may be very helpful for engineers that design the next generation STT-MRAM chips.