MRAM: Next generation memory technologyOsaka University is researching MRAMOsaka's university has a Spintronics research group that is working towards MRAM and STT-RAM using several materials including Graphene. Here's a nice intro video about the group:
MRAM-Info upgradedMRAM-Info was upgraded today (if anyone is interested, we upgraded to Drupal 6.x from 5.8). Most of the changes are infrastructure related so you won't notice much, but hopefully the site should be faster now, more stable and more secure.
Renesas flash memory roadmap includes MRAMRenesas has released a presentation about their flash memory products, which also includes one slide about their flash memory roadmap. The roadmap includes Floating Gate HND (Hyper New DINOR), MONOS (metal Oxide Nitride Oxide Silicon) and also MRAM. 
They plan to have 100 to 150Mhz MRAM at 90nm at around 2010, and 200Mhz MRAM at 65nm at around 2012. They say MRAM is the next-generation RAM, a breakthrough beyond the limit of flash memory.
Fujitsu and University of Toronto develop high-reliability read-method for STT-RAMFujitsu Laboratories and the University of Toronto announced that they have jointly developed the world's first high-reliability read-method for use with spin-torque-transfer (STT) MRAM that is insusceptible to erroneous writes.  STT-MRAM circuit embedded in a CMOS chip
The newly developed read-method uses a negative resistance that is intermediate between the MTJ's high resistance and low resistance on a parallel circuit. If the MTJ is in a high-resistance state, this circuit exhibits negative-resistance characteristics. If the MTJ is in a low-resistance state, then it exhibits normal-resistance characteristics. These characteristics allow the resistance value to be read at lower voltages than before, suppressing the tendency of the read operation to reverse the direction of magnetization and avoiding the problem of erroneous write operations. Fujitsu Laboratories and the University of Toronto plan to continue with R&D related to STT MRAM to strive toward practical implementation, such as lowering write currents and developing process technologies for further miniaturization.
Macronix extends their phase-change memory alliance with IBMDigitimes reports that Macronix has signed an agreement with IBM to continue to co-develop phase-change memory (PCM) technology. The company said it is optimistic about the outlook for PCM, which is likely to be a successor to all memory products used in computers and consumer electronics devices.
NVE updates on Anti-Tamper MRAM research
NVE now reveals that they have received a number of the foundry wafers they have designed and they are in the process of adding MRAM to the wafers. The prototypes look promising so far although a fair amount of development remains before production.
Japanese researchers create a new TMR element that will enable 10 Gbit STT-MRAMResearchers from Japan's AIST institute have developed a new Tunnel-Magnetoresistance (or TMR) element with a low data writing current and high data stability. This kind of TMR is required for high-capacity MRAM. In fact the team says that this TMR can be used to make perpendicular STT-MRAM with densities of over 10GBit. With existing TMRs, there's a trade-off between data writing current and data stability. Data loss happens if the free-layer's magnetization is reversed because of thermal agitation, and if you make a thicker free-layer it solves the data-loss issues, but you need more current. The new design solved this issue by using a free layer that is made from a nonmagnetic layer between two ferromagnetic layers. The resistance to thermal agitation is improved - it is five times better, while the current is only increased by 80%. 
The team used an in-plane magnetization film for the free layer, which can be used to make a 1-Gbit MRAM. They plan to make the current even lower with a perpendicular magnetization film, which will allow for a 10 Gbit MRAM device. Via TechOn
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